In conventional SONET systems, an OC-768 frame is composed of 4 OC-192 frames that are time division multiplexed 64 bytes at a time. This is illustrated in FIG. 1, wherein 64 byte portions, or slices, of four OC-192 frames 1, 2, 3 and 4 are time division multiplexed. The overhead bytes of the multiplexed frames are usually dropped in a 32 bit bus in OC-768 mode. The overhead bytes of an OC-768 mode frame are dropped in the form of sixteen 32-bit words from each OC-192 channel. Most of the logic currently available to process the overhead bytes is intended to be used with OC-192 frames. Accordingly, the overhead bytes of OC-768 frames are typically processed as 4 independent OC-192 frames. This requires demultiplexing the OC-768 frame into its 4 constituent OC-192 frames before the overhead processing, and then multiplexing the 4 constituent OC-192 frames back into the OC-768 frame after overhead processing.
FIG. 2 diagrammatically illustrates an example of a conventional arrangement for converting between OC-768 and OC-192 to permit OC-192 overhead drop/add processing. The arrangement of FIG. 2 utilizes two dual port memories 11 and 15, each having a capacity of 768×N×8×2 bits. Each of the dual port memories stores two entire frames of overhead bytes, where N is 27 for transport overhead (TOH) bytes only, and where N is 36 when all overhead bytes are processed. The dual port memory 11 is divided into first and second portions and, while the overhead bytes for an entire OC-768 frame are written into the first portion of the memory 11, overhead bytes previously written into the second portion of the memory 11 are read out and input to 4 individual OC-192 overhead processing channels shown generally at 13. The dual port memory at 15 is also divided into first and second portions so that the overhead bytes received from the overhead processing channels 13 can be written into the first portion of the memory 15 while overhead bytes previously received from channels 13 and stored in the second portion of the memory 15 are read out and loaded into the output register R2. Thus, data is written to and read from the dual port memory 11 in order to convert from OC-768 to OC-192, and data is written to and read from the dual port memory 15 in order to convert from OC-192 back to OC-768. The outputs of the overhead drop/add processing channels 13 are 9 bits wide in this example because each of the channels adds the conventional ADD_EN bit.
Because each of the dual port memories 11 and 15 is required to store the overhead bytes from two entire OC-768 frames, the FIG. 2 arrangement is quite costly in terms of its memory size requirements. It is therefore desirable to reduce the memory size requirements associated with the OC-768/OC-192 conversions that are required to permit OC-192 processing of the overhead bytes from OC-768 frames.
Exemplary embodiments of the present invention can, for any given OC-192 channel, exploit the data flow differences between OC-768 and OC-192 to effectuate conversion between OC-768 and OC-192 using as little as 256 bytes of memory.